RISC-V Vector Extension in a Nutshell (Part 4): permute operations
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This article is part 4 of a series on RISC-V vector extension, and focuses on permute operations. Part 1, Introduction, is accessible here; part 2, review of arithmetic operations there; part 3, survey of operations with or on masks there. SIMD and Vector instructions sets needs to offer permutation instructions to allow the programmer to manipulate and re-organize data within vector registers. RVV 1.0 offers such instructions in multiple flavours, we will review the permutation instruction families in this post and provide some illustrations.
RISC-V Vector Extension in a Nutshell (Part 4): permute operations
RISC-V Vector Extension in a Nutshell (Part…
RISC-V Vector Extension in a Nutshell (Part 4): permute operations
This article is part 4 of a series on RISC-V vector extension, and focuses on permute operations. Part 1, Introduction, is accessible here; part 2, review of arithmetic operations there; part 3, survey of operations with or on masks there. SIMD and Vector instructions sets needs to offer permutation instructions to allow the programmer to manipulate and re-organize data within vector registers. RVV 1.0 offers such instructions in multiple flavours, we will review the permutation instruction families in this post and provide some illustrations.